OpenAI detailed its first custom inference chip — 216GB of HBM4 in a 700W package

At Hot Chips 2026 on 25 August OpenAI walked through Jalapeno, the inference ASIC it co-developed with Broadcom: 13.4 PFLOP/s of MXFP4 matrix compute and 216GiB of HBM4 at 15.4TB/s in a 700W package, scaling to 2,048 chips for 27 EFLOP/s and 432TiB per cluster. RTL work began in February 2025, the design taped out in November, first silicon arrived in May 2026, and OpenAI had Codex running on it the same month. The talk framed it as generation one of a multi-generation roadmap.

What it means A second large lab off the merchant-GPU path changes who sets inference prices; the 15-month RTL-to-production timeline is the part rivals will read twice.